N25Q032A reading and writing OTP bits

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ant
Posts: 1
Joined: Sat May 20, 2023 5:12 pm

N25Q032A reading and writing OTP bits

Postby ant » Sat May 20, 2023 5:53 pm

Hello,

I am new to the forum and this is my first post so please excuse me if I am doing something wrong.

I am trying to read/write the 64 bytes OTP area on a Micron N25Q032A SPI flash using a script.
Following the device datasheet [1] there is a dedicated instructions for reading 4Bh (and for writing 42h) the OTP bytes.

The following statement in the "Read OTP array command" on page 54 is confusing and I can't figure out how to craft the script to read the OTP properly:
To initiate a READ OTP ARRAY command, S# is driven LOW. The command code is input on DQ0, followed by three bytes and dummy clock cycles.

How to issue/or simulate?/ the "dummy clock cycles" using the script?

I've bought several empty chips for experimenting. So I've tried the following scripts.
To write the OTP on a blank chip:

Code: Select all

#HARDWARE SETTINGS;
HW:SPI,3.3V,NORMAL;

#OPERATION;
SW:1,62,0,0,5,5,10,0,100,500;
INSTR:42;
DATA:FF,00,01,02,03,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF,FF;


To read the OTP:

Code: Select all

#HARDWARE SETTINGS;
HW:SPI,3.3V,NORMAL;

#OPERATION;
SW:0,0,1,63,5,5,10,0,100,500;
INSTR:4B;


The read command is returning 'FF' not the expected FF 00 01 02 03 FF ... bytes.
I've tried INSTR:4B,00,00,00,00 with the same result - all data is FFs.


Any help is welcome.

Best Regards,
Anton

[1]: https://media-www.micron.com/-/media/cl ... v_65nm.pdf

ArT
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Re: N25Q032A reading and writing OTP bits

Postby ArT » Mon May 22, 2023 10:00 am

Hello :) On page 28/82 in datasheet there is information that READ OTP ARRAY command is 4Bh with 8 dummy clock cycles (= 1 byte). Additionaly on page 54/82: "The command code is in-put on DQ0, followed by three bytes and dummy clock cycles" so read script in my opinion should be command (1B) + address (3B) + dummy byte (1B). Address is counted from 0 because on page 13/82 there is information that "64 OTP bytes are located outside the main memory array". There are 3 address bytes.

So I think that READ OTP should be as below:

Code: Select all

#SCRIPT HEADER;
SCRIPT:v1.9.1;
#HARDWARE SETTINGS;
HW:SPI,2.8V,SLOW;

// READ OTP (64 bytes)
#OPERATION;
SW:0,0,1,63,5,5,10,0,100,500;
INSTR:4B,00,00,00,A5;


For write OTP, before you write, you should execute write enable operation (WREN). PROGRAM OTP ARRAY is 42h without any dummy bytes, but still with 3 address bytes. So it should be command (1B) + addr (3B) + write data (1-64 bytes). It can be one additional byte for OTP Control Byte to lock register (0 locked, 1 unlocked -> page 55/82). Here is example without last OTP byte (I added also read OTP at the end):

Code: Select all

#SCRIPT HEADER;
SCRIPT:v1.9.1;
#HARDWARE SETTINGS;
HW:SPI,2.8V,SLOW;

// WRITE ENABLE (06h)
#OPERATION;
SW:0,0,0,0,5,5,0,0,100,500;
INSTR:06; //WREN

// WRITE OTP (64 bytes)
#OPERATION;
SW:1,63,0,0,5,5,10,0,100,500;
INSTR:42,00,00,00;
DATA:00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F,10,11,12,13,14,15,16,17,18,19,1A,1B,1C,1D,1E,1F,20,21,22,23,24,25,26,27,28,29,2A,2B,2C,2D,2E,2F,30,31,32,33,34,35,36,37,38,39,3A,3B,3C,3D,3E,3F;

// READ OTP (64 bytes)
#OPERATION;
SW:0,0,1,63,5,5,10,0,100,500;
INSTR:4B,00,00,00,A5;


I tested it with the N25Q064A but for N25Q032 is the same.
Hope it helps 8-)


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